In advanced CMOS (complementary MOS) device development realized miniaturization of a transistor, deterioration of a drive current due to depletion of a polysilicon (poly-Si) electrode and increase in gate current due to thinning of a gate insulating film become problems. Thus, there has been studied a complex technology for preventing the depletion of the electrode by the application of a metal gate, and, at the same time, increasing a physical film thickness by using a high permittivity material in a gate insulating film to thereby reduce gate leak current. For example, a pure metal, a metal nitride, or a silicide material has been considered as a material used in a metal gate electrode. However, in any case, a threshold value voltage (Vth) of an N-type MOSFET and a P-type MOSFET must be able to be set to an appropriate value. When a conventional gate electrode with interposition of a polycrystalline silicon layer is used, the threshold value voltage of a transistor is determined by an impurity concentration of a channel region and an impurity concentration in the polycrystalline silicon film. Meanwhile, when a metal gate electrode is used, the threshold value voltage of the transistor is determined by the impurity concentration of the channel region and a work function of a gate electrode. To realize Vth of not more than ±0.5V in a CMOS transistor, for the N-type MOSFET, a material with a work function of not more than the mid-gap of Si (4.6 eV), preferably not more than 4.4 eV is required to be used in the gate electrode, and for the P-type MOSFET, a material with a work function of not less than the mid-gap of Si (4.6 eV), preferably not less than 4.8 eV is required to be used in the gate electrode.
As the means for realizing this, there has been considered a metal inserted Poly-Si stacked structure (MIPS: Metal-inserted Poly-silicon Stack) having a high consistency with an existing CMOS fabrication process. In this method, a gate electrode with a metal film inserted in between Poly-Si and a gate insulating film is formed, and the threshold value voltage is regulated by the work function of the inserted gate electrode. At this time, there is a problem that the work function of the metal film is changed by a mutual reaction with the gate insulating film and Poly-Si in a heat treatment process.
For example, Patent Document 1 discloses a method using a gate electrode having a stacked structure of polycrystalline silicon, PVD-TiN (second metal layer), and CVD-TiN (first metal layer). The Patent Document 1 discloses that according to this method, TiN which is the first metal layer is formed at a low temperature of not more than 450° C. by a thermal CVD method using TiCl4 and NH3, whereby TiN suitable for a metal gate of the P-type MOSFET and having a work function of not less than 4.8 eV can be realized. The Patent Document 1 further discloses that TiN which is the second metal layer is formed at 500° C. (higher than the temperature when TiN as the first metal layer is formed) by a PVD method, whereby TiN oriented in a (100) plane is formed. The Patent Document 1 further discloses that TiN oriented in the (100) plane has an effect of suppressing reduction of the work function due to the diffusion of Si from Poly-Si to TiN in a thermal treatment (for example, an activation annealing process) after formation of a gate electrode.
Patent Document 2 discloses a method using a metal gate electrode whose portion in contact with a gate insulating film has an average crystal grain size of not more than 30 nm. The Patent Document 2 discloses that according to this method, when TiN formed by a sputtering method is used as a gate electrode, for instance, formation is performed to control the voltage-dividing ratio between Ar and nitrogen so that at a film-formation temperature of not more than 300° C., the ratio between Ti and N is not 1:1, but the amount of nitrogen is excess, whereby the grain diameter of TiN is not more than 30 nm, and it is possible to suppress a variation of the threshold value voltage of a transistor. The Patent Document 2 further discloses that for the crystal structure of TiN, when a (111) oriented TiN film is used, the variation of the threshold value voltages is small in comparison with the case of using a TiN film in which (111) orientation and (110) orientation coexist.
Patent Document 3 discloses a method of aligning the plane directions of a metal gate electrode of a portion in contact with a gate insulating film. The Patent Document 3 discloses that the work function of TiN is changed by the crystalline orientation of TiN, and the work function is 4.3 eV in the (100) orientation and is 4.6 eV in the (111) orientation.
Patent Document 4 discloses, as a method of changing the work function of TiN, a technique for changing the work function by a nitrogen concentration of titanium nitride, using a gate electrode having a stacked structure of high-melting-point metals such as TiN and tungsten. The Patent Document 4 discloses that according to this method, the work function can be reduced by the increase of the flow ratio of nitrogen gas in the formation of TiN by ion implantation of nitrogen into a TiN film and reactive sputtering and by the increase of the percentage of nitrogen contained in the TiN film. The Patent Document 4 further discloses that the nitrogen content percentage in the reactive sputtering is 100%, so that the crystalline orientation of the TiN film is changed to (200) substantially, whereby TiN with a low work function suitable for a gate electrode of an N-type channel MOSFET can be obtained.
Patent Document 5 discloses a method of suppressing a reaction occurring between a gate electrode using TiN and a high-permittivity gate insulating film. The Patent Document 5 discloses that according to this method, in the gate electrode having a stacked structure of TiN and tungsten, the film density of TiN is not less than 5.0 g/cm3, the crystal structure is the (100) orientation, and a film composition Ti/N is set within a range of 1.0 to 1.2, whereby the mutual reaction between TiN and the high-permittivity gate insulating film can be suppressed.